Place Footprints and Draw Outline of PCB
Place Footprints
2. Right-click and select Move.
3. Move the footprints apart.
4. The white lines are called air wires.
5. They are collectively known as a rat’s nest.
6. Move and rotate footprints until you have the least number of air wire crossings.
7. I follow the circuit drawing in my placing of footprints.
8. After placement of the footprints, it should be as in figure 1.14A below:
Fig. 1,14A: After Placement of The Footprints
Draw Board Edge or Outline of Printed Circuit Board (PCB)
2. Click on the Place menu and select Line.
3. You can also on the right click on the icon with blue lines connected by green dots
4. Draw a box around the components to form the outline PCB.
1. Select the left vertical line and right-click.
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 4,1 in
4.2. Start point Y: 5,3 in
4.3. End point X: 4,1 in
4.4. End point Y: 3,2 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
4. Draw a box around the components to form the outline PCB.
Draw Left Vertical Line
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 4,1 in
4.2. Start point Y: 5,3 in
4.3. End point X: 4,1 in
4.4. End point Y: 3,2 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
Draw Top Horizontal Line
1. Select the left vertical line and right-click.
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 4,1 in
4.2. Start point Y: 3,2 in
4.3. End point X: 7,7 in
4.4. End point Y: 3,2 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 4,1 in
4.2. Start point Y: 3,2 in
4.3. End point X: 7,7 in
4.4. End point Y: 3,2 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
Draw Right Vertical Line
1. Select the left vertical line and right-click.
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 7,7 in
4.2. Start point Y: 5,3 in
4.3. End point X: 7,7 in
4.4. End point Y: 3,2 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
10. Now do the same for the Back Copper (B.Cu) layer.
11. Also select ground GND.
12. This project does not have a VCC Net.
13. In the end, the filled back copper layer should look something like in figure 1.14F below.
Fig. 1.14F: Filled Back Copper Layer
1. Select Add ext to copper layers or graphic text the T icon and B.SilkS layer.
2. Type “V-01”.
3. The copper fill on the back copper layer and the version number is shown in
figure 1.14G below:
Fig. 1.14G: Version Numer V-01 on Back Silk Screen
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 7,7 in
4.2. Start point Y: 5,3 in
4.3. End point X: 7,7 in
4.4. End point Y: 3,2 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
Draw Bottom Horizontal Line
1. Select the left vertical line and right-click.
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 4,1 in
4.2. Start point Y: 5,3 in
4.3. End point X: 7,7 in
4.4. End point Y: 5,3 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
1. Move the footprints onto the board.
2. The circuit with the current in each track is shown in figure 1.14B below:
3. Once again spread the footprints that you have a minimum of crossings
on the board.
1. It should be kept in mind when routing the tracks the pads of the surface-mounted
2. Select Properties … E.
3. Line Properties window opens.
4. Set
4.1. Start point X: 4,1 in
4.2. Start point Y: 5,3 in
4.3. End point X: 7,7 in
4.4. End point Y: 5,3 in
4.5. Item thickness: 5,0 mils
4.6. Layer: Edge.Cuts
4.7. Click OK.
Move Footprints onto the Board
1. Move the footprints onto the board.
2. The circuit with the current in each track is shown in figure 1.14B below:
Fig, 1.14B: Circuit with Current In Each Track |
3. Once again spread the footprints that you have a minimum of crossings
on the board.
Route The Tracks
components are on the front copper layer.
2. These pads are therefore only directly accessible on the front copper layer.
3. It is the layer indicated by a maroon, brown-reddish color, and abbreviated F. Cu.
4. The through-hole components are accessible on both the front and back copper layer.
5. The back copper layer is indicated with a green color and abbreviated as B. Cu.
For Maximum of 2A Tracks
1. For a maximum of 2A in Pcbnew select from the above dropdown list:
Track: 22,00 mils (0,559 mm) and Via: 36,0/18 mils (0,91/0,46mm)
2. Click on Route tracks icon.
3. It is the icon on the right with the green squiggly line.
4. Then do the power tracks mostly on the Front Copper (F.Cu) layer.
1. Now do the low current (below 100mA) signal tracks.
2. In Pcbnew select from the above dropdown list:
Track: 10,00 mils (0,254 mm) and Via: 20,0/10,0 mils (0,51/0,25mm)
3. Click on Route tracks icon.
4. It is the icon on the right with the green squiggly line from the top left corner to
the right bottom corner.
5. Then do the signal tracks on the Back Copper (B.Cu) layer.
6. Do not do the ground connections at this stage.
7. Use vias to jump over tracks if you have to.
8. The circuit with the routed tracks is shown in figure 1.14C below:
Fig. 1.14C: Circuit With Routed or Traced Tracks
9. The white lines or air wires are the ground connections which will be connected with a
copper fill.
1. Select the Front Copper (F.Cu) layer.
2. Select the Filled zones tool on the right.
3. It is the icon with a square green background and a grey annular pad and track.
4. Click on the viewing area.
5. The Copper Zone Properties window opens as shown in figure 1.14D below.
6. Under Net select GND.
7. Click OK.
8. Draw the fill rectangle close around the outer edge of the board
9. Double click to end selection.
2. Click on Route tracks icon.
3. It is the icon on the right with the green squiggly line.
4. Then do the power tracks mostly on the Front Copper (F.Cu) layer.
For Maximum of 100mA Tracks
1. Now do the low current (below 100mA) signal tracks.
2. In Pcbnew select from the above dropdown list:
Track: 10,00 mils (0,254 mm) and Via: 20,0/10,0 mils (0,51/0,25mm)
3. Click on Route tracks icon.
4. It is the icon on the right with the green squiggly line from the top left corner to
the right bottom corner.
5. Then do the signal tracks on the Back Copper (B.Cu) layer.
6. Do not do the ground connections at this stage.
7. Use vias to jump over tracks if you have to.
8. The circuit with the routed tracks is shown in figure 1.14C below:
Fig. 1.14C: Circuit With Routed or Traced Tracks
9. The white lines or air wires are the ground connections which will be connected with a
copper fill.
Copper Fill
Front Copper Layer
2. Select the Filled zones tool on the right.
3. It is the icon with a square green background and a grey annular pad and track.
4. Click on the viewing area.
5. The Copper Zone Properties window opens as shown in figure 1.14D below.
Fig. 1.14D: Copper Zone Properties |
6. Under Net select GND.
7. Click OK.
8. Draw the fill rectangle close around the outer edge of the board
9. Double click to end selection.
10. The filled Front Copper (F.Cu) layer should look as in figure 1.14E below.
Fig. 1.14E: Filled Front Copper Layer
Back Copper Layer
10. Now do the same for the Back Copper (B.Cu) layer.
11. Also select ground GND.
12. This project does not have a VCC Net.
13. In the end, the filled back copper layer should look something like in figure 1.14F below.
Fig. 1.14F: Filled Back Copper Layer
Place Version Number
2. Type “V-01”.
3. The copper fill on the back copper layer and the version number is shown in
figure 1.14G below:
Fig. 1.14G: Version Numer V-01 on Back Silk Screen
4. A close-up of the copper fill on the back copper layer and the version number is shown in
figure 1.14H below:
Fig. 1.14H: Close-Up of Version Number V-01 on Back Silk Screen
Previous: Tutorial 1.13 Track or Trace Clearance, Conductor Spacing, Vias, Design Rules
figure 1.14H below:
Fig. 1.14H: Close-Up of Version Number V-01 on Back Silk Screen
Previous: Tutorial 1.13 Track or Trace Clearance, Conductor Spacing, Vias, Design Rules
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